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FINAM
finam
Commits
50401a61
Commit
50401a61
authored
2 years ago
by
Martin Lange
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implement check for missing component
parent
821c4522
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1 merge request
!148
Check missing components in composition
Changes
2
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2 changed files
src/finam/errors.py
+4
-0
4 additions, 0 deletions
src/finam/errors.py
src/finam/schedule.py
+54
-4
54 additions, 4 deletions
src/finam/schedule.py
with
58 additions
and
4 deletions
src/finam/errors.py
+
4
−
0
View file @
50401a61
...
...
@@ -38,3 +38,7 @@ class FinamMetaDataError(Exception):
class
FinamDataError
(
Exception
):
"""
Error for wrong data in FINAM.
"""
class
FinamConnectError
(
Exception
):
"""
Error for wrong connection setup in FINAM.
"""
This diff is collapsed.
Click to expand it.
src/finam/schedule.py
+
54
−
4
View file @
50401a61
...
...
@@ -15,12 +15,12 @@ import time
from
datetime
import
datetime
from
pathlib
import
Path
from
.errors
import
FinamStatusError
from
.errors
import
FinamConnectError
,
FinamStatusError
from
.interfaces
import
(
ComponentStatus
,
IAdapter
,
IComponent
,
IInput
,
IOutput
,
ITimeComponent
,
Loggable
,
NoBranchAdapter
,
...
...
@@ -207,6 +207,9 @@ class Composition(Loggable):
for
out
in
mod
.
outputs
.
values
():
_check_branching
(
mod
,
out
)
with
ErrorLogger
(
self
.
logger
):
_check_missing_modules
(
self
.
modules
)
def
_connect_components
(
self
):
self
.
logger
.
debug
(
"
connect components
"
)
counter
=
0
...
...
@@ -296,6 +299,51 @@ class Composition(Loggable):
)
def
_check_missing_modules
(
modules
):
inputs
,
outputs
=
_collect_inputs_outputs
(
modules
)
mod_inputs
=
{
inp
for
mod
in
modules
for
inp
in
mod
.
inputs
.
values
()}
mod_outputs
=
{
out
for
mod
in
modules
for
out
in
mod
.
outputs
.
values
()}
unlinked_inputs
=
inputs
-
mod_inputs
mod_outputs
=
outputs
-
mod_outputs
if
len
(
unlinked_inputs
)
>
0
:
raise
FinamConnectError
(
f
"
A component was coupled, but not added to this Composition.
"
f
"
Affected inputs:
{
list
(
unlinked_inputs
)
}
"
)
if
len
(
mod_outputs
)
>
0
:
raise
FinamConnectError
(
f
"
A component was coupled, but not added to this Composition.
"
f
"
Affected outputs:
{
list
(
mod_outputs
)
}
"
)
def
_collect_inputs_outputs
(
modules
):
all_inputs
=
set
()
all_outputs
=
set
()
for
mod
in
modules
:
for
_
,
inp
in
mod
.
inputs
.
items
():
while
isinstance
(
inp
,
IInput
):
inp
=
inp
.
get_source
()
all_outputs
.
add
(
inp
)
for
_
,
out
in
mod
.
outputs
.
items
():
targets
=
{
out
}
while
len
(
targets
)
>
0
:
target
=
targets
.
pop
()
curr_targets
=
target
.
get_targets
()
for
target
in
curr_targets
:
if
isinstance
(
target
,
IOutput
):
targets
.
add
(
target
)
else
:
all_inputs
.
add
(
target
)
return
all_inputs
,
all_outputs
def
_check_branching
(
module
,
out
):
targets
=
[(
out
,
False
)]
...
...
@@ -312,14 +360,16 @@ def _check_branching(module, out):
)
for
target
in
curr_targets
:
if
isinstance
(
target
,
I
Adapter
):
if
isinstance
(
target
,
I
Output
):
targets
.
append
((
target
,
no_branch
))
def
_check_input_connected
(
module
,
inp
):
while
isinstance
(
inp
,
IInput
):
if
inp
.
get_source
()
is
None
:
raise
ValueError
(
f
"
Unconnected input
'
{
inp
.
name
}
'
for module
{
module
.
name
}
"
)
raise
ValueError
(
f
"
Unconnected input
'
{
inp
.
name
}
'
for target module
{
module
.
name
}
"
)
inp
=
inp
.
get_source
()
...
...
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